Cadence PCB设计高级培训
课程目标
高速PCB设计的潮流已经滚滚而来，如何预防PCB板上出现的信号反射、串扰、电源/地平面干扰、
时序匹配以及电磁兼容性等一系列新问题好象突然间挡在了您的面前。如何应对新的设计挑战？
Cadence培训高级班将首先让您了解这些问题产生的机理，并掌握其解决方法；然后讲解并上
机练习Cadence的高速 PCB设计与仿真工具SPECCTRAQuest的使用。使您在硬件设计过程中，
能够达到“设计即正确”的目的。
培训对象
在工作实践中遇到了高速数字电路与高速PCB设计问题；对高速PCB设计感兴趣的硬件工程师；
已经具备一定的硬件开发经验，需要增加就业竞争力的在校硕士及博士研究生；具备非常扎实的
电子工程基本知识，并积累了相当程度的硬件工程师工作经验的在校本科生。
课程内容
1 高速PCB设计中的理论基础
传输线理论、信号完整性（反射、串扰、过冲、地弹、振铃等）、电磁兼容性和时序匹配等等。
2 SPECCTRAQuest设计流程
2.1 Pre-Placement
2.2 Board Setup Requirements for Extracting and Applying Topologies
2.3 Database Setup Advisor
—Cross-Section
—DC Nets
—DC Voltages
—Device Setup . ??—SI Models
—SI Audit
3 拓扑结构的抽取与仿真 Extracting and Simulating Topologies
3.1 Pre-Route Extraction Setup—Default Model Selection.
3.2 Pre-Route Extraction Setup—Unrouted Interconnect
3.3 Pre-Route Template Extraction
3.4 SQ Signal Explorer Expert
3.5 Analysis Preferences
3.6 SigWave
3.7 Delay Measurements
4 确定和施加约束 Determining and Adding ConstraintsSolution
4.1 Solution SpaceAnalysis: Step 1 to 6
4.2 Parametric Sweeps.
4.3 Constraints :
Topology Template Constraints
Switch/Settle Constraints
Assigning the Prop Delay Constraints
Impedance Constraint
Relative Propagation Delay Constraint
Diff Pair Constraints
Max Parallel Constraint
Wiring Constraint
User-Defined Constraint
Signal Integrity Constraints
4.4 Usage of Constraints Defined in Topology Template
5 模板应用和基于约束的布局
Template Applications and Constraint-Driven Placement
5.1 Creating a Topology
5.2 Wiring the Topology
5.3 TLines and Trace Models
5.4 Coupled Traces
5.5 RLGC Matrix of Coupled Trace Models
5.6 Crosstalk Simulation in SQ Signal Explorer Expert
5.7 Simulating with Coupled-Trace Models
5.8 Sweep Simulation Results with Coupled-Trace Models
5.9 Extracting a Topology Using the Constraint Manager
5.10 Electrical Constraint Set
5.11 Applying Electrical CSet
5.12 Worksheet Analysis
5.13 Spacing and Physical Rule Sets
5.14 Electrical Rule Set
6 基于约束的布线 Constraint-Driven Routing
6.1 Manual Routing
6.2 Routing with the SPECCTRA Smart Route
6.3 Driving Constraints in Routing
7 布线后的DRC检查和分析 Post-Route DRC and Analysis
7.1 Post-Route Analysis
7.2 SigNoise
7.3 Reflection Simulation
7.4 Reflection Waveform Analysis
7.5 Comprehensive Simulation
7.6 Crosstalk Simulation
7.7 Crosstalk Analysis
7.8 Simultaneous Switching Noise Simulation
7.9 SSN Waveform Analysis
7.10 System-Level Analysis
7.11 A Complete Design Link
7.12 Initialize Design Link
8 差分信号设计 Differential Pair Design Exploration
8.1 Types of Differential Pairs in SPECCTRAQuest
8.2 Create Differential Pair Using SPECCTRAQuest
8.3 Create Differential Pair Using Constraint Manager
8.4 Assigning Differential Pair Signal Models
8.5 Preference to Extract Unrouted Differential Pair Topology
8.6 Extracting Unrouted Differential Pair Topology
8.7 Custom Stimulus to Analyze Differential Pair Topology
8.8 Differential Pair Topology Analysis
8.9 Coupled Trace Model and Differential Pair Topology
8.10 Layout Cross-section Editor
8.11 Differential Pair Constraints
8.12 Differential Pair Constraints in the Constraint Manager
8.13 Differential Pair Analysis in the Constraint Manager
8.14 Post Route Extraction
如果您想学习本课程，请
预约报名
如果没找到合适的课程或有特殊培训需求，请
订制培训
除培训外，同时提供相关技术咨询与技术支持服务，有需求请发需求表到邮箱soft@info-soft.cn,或致电4007991916
技术服务需求表下载请点击
服务优势：
丰富专家资源，精准匹配相关行业，相关项目技术精英，面向用户实际需求，针对性培训或咨询，互动式交流，案例教学，精品小班，实际工程项目经验分享，快捷高效，节省时间与金钱，少走弯路与错路。
专家力量：
中国科学院相关研究所高级研究人员
西门子，TI,vmware，MSC,Ansys，MDI，Mentor, candence,Altium,Atmel 、Freescale,达索，华为等
大型公司高级工程师，项目经理，技术支持专家
中科信软培训中心，资深专家或讲师
大多名牌大学，硕士以上学历，相关学历背景专业，理论素养高
多年实际项目实践，大型复杂项目实战案例分享，热情，乐于技术分享
针对客户实际需要，真实案例演示，互动式沟通，学有所值
